Group
Current and former graduate researchers in the Waterloo Configurable Architectures Group.
The Waterloo Configurable Architectures Group (WatCAG) works across computer architecture, digital hardware, FPGA CAD, machine learning, and design automation.
Current PhD Students
- Emir Guevara · PhD, Fall 2025–present
- Ahmed Elsousy · PhD, Fall 2025–present · co-supervised with Andrew Boutros
- Thomas Badros · PhD, Fall 2025–present · co-supervised with Andrew Boutros
Current MASc Students
- Jehanzeb Mirza · MASc, Winter 2023–present · co-supervised with Vincent Gaudet · Queen Elizabeth II Graduate Scholarship in Science and Technology recipient
Graduate Alumni
University of Waterloo
- Gurshaant Malik, PhD (2017–2025) · Learning Design Parameters to Build Application Customizable Network-on-Chips for FPGAs
- Marat Bekmyrza, MASc (2021–2025), co-supervised with Hiren Patel · Language Model Inference on FPGA with Integer-only Operations
- Mohammad Hadi Omidi, MASc (2021–2024), co-supervised with Seyed Zahedi · Fair and Efficient Resource Scheduling in Heterogeneous Multi-Agent Systems
- Aravind Vellora Valayapara, MASc (2021–2023), co-supervised with Seyed Zahedi · Fairness Notions on Hardware Resource Configuration
- Long Chung Chan, MASc (2020–2021) · Implementing FPGA-optimized Systolic Arrays using 2D Knapsack and Evolutionary Algorithms
- Alireza Mellat, MASc (2020–2021) · Mocarabe: High-Performance Time-Multiplexed Overlays for FPGAs
- Srinirdheeshwar Kuttuva Prakash, MASc (2019–2021) · Managing HBM Bandwidth in Multi-Die FPGAs using Overlay NoCs
- Ian Elmor Lang, MASc (2019–2021) · Worst-Case Latency Analysis for the Versal Network-on-Chip
- Benjamin Morcos, MASc (2017–2019) · NengoFPGA: an FPGA Backend for the Nengo Neural Simulator
- Tushar Garg, MASc (2017–2019) · HopliteBuf FPGA Network-on-Chip: Architecture and Analysis
Earlier Institutions
- Siddhartha, PhD, Nanyang Technological University (2013–2019) · Dataflow Optimized Overlays for FPGAs
- Cheah Hui Yan, PhD, Nanyang Technological University (2014–2016), co-supervised with Suhaib Fahmy · The iDEA Architecture-Focused FPGA Soft Processor
- Ye Deheng, PhD, Nanyang Technological University (2012–2016), co-supervised with Zhenchang Xing
- Andrew Bean, PhD, Imperial College London (2011–2016), research collaborator · Adaptive/Learning Systems using FPGAs
- Abid Rafique, PhD, Imperial College London (2010–2013) · Accelerating Semi-Definite Programming with FPGAs, GPUs and Multi-Cores
The full CV includes additional MSc, undergraduate, intern, and corporate collaborations.